1. A 4 value TTL gate circuit is used to design 4 value RS flip flop , D flip flop and JK flip flop. 采用自己研究出来的四值TTL门电路，设计出了四值RS触发器、D触发器和JK触发器。
2. Represents various forms of flip-flop. Flip-flop type can be specified. 表示各种类型的触发器。可指定触发器类型。
3. From function equations of different kinds of flip-flop integrated circuits, we discussed the methods of function change from final product JK of D flip-flop to other kind in use. 从各种时钟触发器的特性方程出发，讨论了实际生产的集成时钟触发器JK型和D型向实用中可能使用的其他各类触发器转换的方法。
4. Use verilog hdl to implement a flip-flop with synchronous RESET and SET, a Flip-flop with asynchronous RESET and SET. 实现同步置位和复位的触发器。实现异步置位和复位的触发器。
5. This flip-flop has correct logic function as a dynamic D flip-flop, and has the distinct advantage of simple structure, small chip area, and simple two-phase clock. 该触发器能很好地实现动态D触发器的逻辑功能，并且具有结构简单、芯片面积小、时钟简单等优点。
网络释义
delayed flip-flop delay flip-flop 延迟[双稳态]触发器;
delayed flip-flop delay flip-flop 延迟[双稳态]触发器;
clocked flip-flop 时钟触发器;
时标触目惊心发器，定时触发器;
complementing flip flop 求反触发器;
flip-flop and bioautography 释义：触发和生物自显图谱法,触发和生物自显影术;
